Technology
Kovilta´s technology is built on years of academic and commercial research and development. We have a range of available innovative solutions which can be utilised for various challenging image analysis applications. Below you can find a short description of our key technologies. Please contact us for further information. You can also find videos captured with the RECER and KOVA1 cameras in our Demo Gallery.
RECER: Event-Image Sensor and Near-Sensor Processing on the Same Chip
Extremely fast attention capture – Capture and analysis of visual data on the same sensor-processor chip at up to 5000fps. The sensor chip provides provides intensity (grayscale) images, temporal difference events as well as "complex events" which are enriched data e.g. from on-chip feature segmentation. All of this data is provided synchronously, in a frame-based format which is easily applicable in external analysis algorithms and SW.
Excellent low-light imaging and high dynamic range (HDR) – Logarithmic always-on sensor technology provides high sensitivity at low illumination while also preventing image saturation at high illumination. Image capure speed is not limited by integration time.
On-chip edge compute – Processing of Gpixels/s @TOPS range for spatio-temporal feature analysis with minimal latency. No internal data transfer bottlenecks. Radical raw data to output data reduction while at the same time retaining and enriching relevant information
Digital twin and SW support – Digital twin with HW-realistic modeling of the sensor chip operation is available for use either on a conventional smartphone camera HW or PC. This, together with a flexible SW interface allows for fast application-level development.
Reference camera units based on the RECER-R1 chip are now available for pre-order!
Sensor-level processing
Efficient on-chip computation. Kovilta's highly optimized on-chip processing circuitry employs very efficient analog and digital (mixed-mode) computation near the sensor front-end, using massively parallel dataflow compute. This allows to implement image processing operations at the same rate as the data is read out from the pixels, without any addtional data transfer of compute lag.
Kovilta's camera system solutions offer several benefits in speed/size/weight/energy -critical visual analysis applications, such as mobile robotics and automotive sensor systems:
SPEED
- On-chip real-time compute allows minimal photon-to-actuation lag
DATA REDUCTION
- Fast on-chip analysis can provide data only when/where needed and help point the attention of other sensors to reduce unnecessary system-level data transfer
BETTER DATA
- Excellent low light operation and HDR tolerance. Readout of enriched data from on-chip compute
REDUCED POWER CONSUMPTION
- Energy efficient on-sensor compute, which also reduces the need for additional high-performance processing on the system level
SMALLER HW
- Single-chip RECER solution helps to reduce the need for additional compute HW
SIMPLE SOFTWARE
- Flexible SW interface, digital twin and algorithm libraries hide the HW complexity, allowing it to be used efficiently in different products and applications
Kovilta's sensor technology can be applied as a stand-alone compact unit or as a part of a larger sensor-fusion system to increase the efficiency of transferring and analysing data from other sensor sources, by guiding their attention to relevant features, objects and dynamic events.
Focal-plane processing
Kovilta´s KOVA1 was the first silicon implementation of the KOVA (KOvilta Vision Array -architecture), comprising a 96x96 pixel focal-plane processor array, manufactured in 180nm CMOS technology. The sensor-processor chip was embedded into a custom compact smart-camera system with FPGA-based control and Ethernet I/O.
Significant advantages in both processing speed and energy consumption. In the focal plane processor architecture, each pixel-cell of the sensor array contains a programmable processor element, which operates directly on the analog photodiode output. This enables e.g. real-time (no delay) compression of image data for capturing difficult high dynamic range scenes without loss of detail. Pixel-parallel processing on the sensor plane also enables very high speed low-level feature analysis and removes high-cost (time, energy) long-distance data transfers from sensor to external processor.
Applicable technology for future products. Kovilta is currently testing a chip implementation which combines the RECER architecture with programmable image-parallel Cellular Nonlinear Network array, together with several other new on-chip analysis features. This allows perform the same types of iterative image content analysis operations as the KOVA1 chip, however with larger input image resolution. This techology will be adopted in future versions of Kovilta's RECER products.
KOVA1: Capturing what is essential
Efficient integration to higher level image content analysis systems. The output data from the sensor can consist only of an indication of the presence of a desired image property or event (yes/no, 1 bit), or e.g. a set of object coordinates or object features (segmented image). With the sensor-processor output containing only the required feature data, additional external image-content analysis can be implemented with greatly relaxed hardware requirements.
Complex algorithms can be performed completely within the sensor chip.The pixel cells in the array are physically interconnected within their local neighborhoods, allowing direct information exhange in sensor-level image analysis operations. Local, pixel-level memories allow multiple full images or intermediate processing results to be stored on the sensor plane.
Kovilta Oy
Joukahaisenkatu 1
FI-20520 Turku
Finland