Kovilta´s technology is built on years of academic and commercial research and development. We have a range of available innovative solutions which can be utilised for various challenging image analysis applications. Below you can find a short description of our key technologies. Please contact us for further information. You can also find videos captured with the KOVA1 prototype camera in our Demo Gallery.
Efficient pixel-level computation. Kovilta's highly optimized pixel-level processing circuitry employs very efficient analog and digital (mixed-mode) computation to perfom a wide range of programmable operations, ranging from automatic sensor adaptation, grayscale filtering and segmentation to complex object level visual analysis. To optimize implementation efficiency, the operations to be implemented in pixel-level hardware can be selected based on application needs.
Kovilta´s KOVA1 is the first silicon implementation of the KOVA (KOvilta Vision Array -architecture), comprising a 96x96 pixel focal-plane processor array, manufactured in 180nm CMOS technology. The sensor-processor chip is embedded into a custom compact smart-camera system with FPGA-based control and Ethernet I/O.
Significant advantages in both processing speed and energy consumption. In the focal plane processor architecture, each pixel-cell of the sensor array contains a programmable processor element, which operates directly on the analog photodiode output. This enables e.g. real-time (no delay) compression of image data for capturing difficult high dynamic range scenes without loss of detail. Pixel-parallel processing on the sensor plane also enables very high speed low-level feature analysis and removes high-cost (time, energy) long-distance data transfers from sensor to external processor.
Capturing what is essential
Efficient integration to higher level image content analysis systems. The output data from the sensor can consist only of an indication of the presence of a desired image property or event (yes/no, 1 bit), or e.g. a set of object coordinates or object features (segmented image). With the sensor-processor output containing only the required feature data, additional external image-content analysis can be implemented with greatly relaxed hardware requirements.
Complex algorithms can be performed completely within the sensor chip.The pixel cells in the array are physically interconnected within their local neighborhoods, allowing direct information exhange in sensor-level image analysis operations. Local, pixel-level memories allow multiple full images or intermediate processing results to be stored on the sensor plane.
Embedded for excellence
Compact embedded camera platform. The KOVA1 embedded camera system includes a Field Programmable Gate Array (FPGA) -chip, which controls the program execution and I/O of the sensor-processor chip. Because the control and I/O structures only consume a small a part of the resources available within the FPGA, it is also possible to implement additional visual analysis operations on the FPGA, to complement the on-chip sensor-level processing.
Autonomous smart camera operation. The camera can be programmed and controlled through Kovilta's KEDE software environment. Programming and data I/O is implemented via an Ethernet connection, while direct CMOS-signal outputs bypassing the network interface are also available. Program code can be stored within (non-volatile) memory inside the camera. The camera can be operated autonomously without any PC-connection, i.e. to provide output data to some other Ethernet-connected or directly controlled device.